On Fri, Sep 16, 2022 at 12:12:11AM -0700, Yi Liu wrote:
> Check 5-level paging capability for 57 bits address width instead of
> checking 1GB large page capability.
>
> Fixes: 53fc7ad6edf2 ("iommu/vt-d: Correctly calculate sagaw value of IOMMU")
> Cc: stable@xxxxxxxxxxxxxxx
> Reported-by: Raghunathan Srinivasan <raghunathan.srinivasan@xxxxxxxxx>
> Signed-off-by: Yi Liu <yi.l.liu@xxxxxxxxx>
Reviewed-by: Jerry Snitselaar <jsnitsel@xxxxxxxxxx
> ---
> drivers/iommu/intel/iommu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
> index 1f2cd43cf9bc..664499dddf0c 100644
> --- a/drivers/iommu/intel/iommu.c
> +++ b/drivers/iommu/intel/iommu.c
> @@ -399,7 +399,7 @@ static unsigned long __iommu_calculate_sagaw(struct intel_iommu *iommu)
> {
> unsigned long fl_sagaw, sl_sagaw;
>
> - fl_sagaw = BIT(2) | (cap_fl1gp_support(iommu->cap) ? BIT(3) : 0);
> + fl_sagaw = BIT(2) | (cap_5lp_support(iommu->cap) ? BIT(3) : 0);
> sl_sagaw = cap_sagaw(iommu->cap);
>
> /* Second level only. */
> --
> 2.34.1
>
