On Sat, Sep 17, 2022 at 07:41:34AM -0700, Palmer Dabbelt wrote:
> On Fri, 16 Sep 2022 05:22:59 PDT (-0700), Conor.Dooley@xxxxxxxxxxxxx wrote:
> > On 15/09/2022 18:13, Conor Dooley wrote:
> > > On 15/09/2022 18:09, Palmer Dabbelt wrote:
> > > > We could make the T-Head CMOs depend on a new-enough assembler to have
> > > > Zicbom, but it's not strictly necessary because the T-Head CMOs
> > > > circumvent the assembler.
> > > >
> > > > Fixes: 8f7e001e0325 ("RISC-V: Clean up the Zicbom block size probing")
> > > > Cc: stable@xxxxxxxxxxxxxxx
> > > > Reported-by: kernel test robot <lkp@xxxxxxxxx>
> > > > Reported-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
> > >
> > > I build-tested this last night when I accidentally found it so:
> > > Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
> >
> > This is the one you I noticed you missed, msg-id is:
> > 4d943291-f78f-31ed-0d67-7073e1f762e2@xxxxxxxxxxxxx
>
> Sorry about that, the scripts to search for a Reviewed-by weren't handling
> the base64 encoding that Exchange was doing. It should be fixed, at least
> it is for the test merge I just made.
I'm just going to bite the bullet & learn lei + mutt & use my korg
address for all mailing list things.* At least that'll help with my
mails getting through to rivos inboxes if they come via infread too.
>
> >
> > >
> > > > Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx>
> > > > ---
> > > > arch/riscv/include/asm/cacheflush.h | 6 +++++-
> > > > 1 file changed, 5 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h
> > > > index a89c005b4bbf..273ece6b622f 100644
> > > > --- a/arch/riscv/include/asm/cacheflush.h
> > > > +++ b/arch/riscv/include/asm/cacheflush.h
> > > > @@ -42,8 +42,12 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
> > > > #endif /* CONFIG_SMP */
> > > > -#ifdef CONFIG_RISCV_ISA_ZICBOM
> > > > +/*
> > > > + * The T-Head CMO errata internally probe the CBOM block size, but otherwise
> > > > + * don't depend on Zicbom.
> > > > + */
> > > > extern unsigned int riscv_cbom_block_size;
> > > > +#ifdef CONFIG_RISCV_ISA_ZICBOM
> > > > void riscv_init_cbom_blocksize(void);
> > > > #else
> > > > static inline void riscv_init_cbom_blocksize(void) { }
> >
>
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