On 13/09/2022 15:03, Greg Kroah-Hartman wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
>
> [ Upstream commit 9d7b3078628f591e4007210c0d5d3f94805cff55 ]
>
> "make dtbs_check" reports:
>
> arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dt.yaml: soc: refclk: {'compatible': ['fixed-clock'], '#clock-cells': [[0]], 'clock-frequency': [[600000000]], 'clock-output-names': ['msspllclk'], 'phandle': [[7]]} should not be valid under {'type': 'object'}
> From schema: dtschema/schemas/simple-bus.yaml
>
> Fix this by moving the node out of the "soc" subnode.
> While at it, rename it to "msspllclk", and drop the now superfluous
> "clock-output-names" property.
> Move the actual clock-frequency value to the board DTS, since it is not
> set until bitstream programming time.
>
> Signed-off-by: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx>
> Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
> Tested-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
> Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx>
> Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
Hey,
I only got this patch and nothing else in my inbox related to the dts
that depends on the patch. Has this been autoselected? I don't really
think there's much benefit to backporting this one to 5.15 as the
board itself didn't even boot for another three kernel releases.
Thanks,
Conor.
> ---
> .../boot/dts/microchip/microchip-mpfs-icicle-kit.dts | 4 ++++
> arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 12 +++++-------
> 2 files changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> index cce5eca31f257..4b69ab4ff30a2 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> @@ -40,6 +40,10 @@
> };
> };
>
> +&refclk {
> + clock-frequency = <600000000>;
> +};
> +
> &serial0 {
> status = "okay";
> };
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> index 4ef4bcb748729..9279ccf20009a 100644
> --- a/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> @@ -139,6 +139,11 @@
> };
> };
>
> + refclk: msspllclk {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + };
> +
> soc {
> #address-cells = <2>;
> #size-cells = <2>;
> @@ -188,13 +193,6 @@
> #dma-cells = <1>;
> };
>
> - refclk: refclk {
> - compatible = "fixed-clock";
> - #clock-cells = <0>;
> - clock-frequency = <600000000>;
> - clock-output-names = "msspllclk";
> - };
> -
> clkcfg: clkcfg@20002000 {
> compatible = "microchip,mpfs-clkcfg";
> reg = <0x0 0x20002000 0x0 0x1000>;
> --
> 2.35.1
>
>
>
