From: Andrejs Cainikovs <andrejs.cainikovs@xxxxxxxxxxx>
[ Upstream commit be1e3dfecf7d2fbcb4a45b113da637983878246c ]
Update SPI CAN controller clock to match current hardware design.
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@xxxxxxxxxxx>
Acked-by: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx>
Fixes: 6a57f224f734 ("arm64: dts: freescale: add initial support for verdin imx8m mini")
Signed-off-by: Shawn Guo <shawnguo@xxxxxxxxxx>
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
index eafa88d980b32..2841c6bfe3a92 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
@@ -32,10 +32,10 @@
};
/* Fixed clock dedicated to SPI CAN controller */
- clk20m: oscillator {
+ clk40m: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
- clock-frequency = <20000000>;
+ clock-frequency = <40000000>;
};
gpio-keys {
@@ -194,7 +194,7 @@
can1: can@0 {
compatible = "microchip,mcp251xfd";
- clocks = <&clk20m>;
+ clocks = <&clk40m>;
interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_int>;
--
2.35.1
