On 23/08/2022 09:03, Greg Kroah-Hartman wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe > > From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > > [ Upstream commit af8f260abc608c06e4466a282b53f1e2dc09f042 ] > > The fu540 has no cpu-map node, so tools like hwloc cannot correctly > parse the topology. Add the node using the existing node labels. > > Reported-by: Brice Goglin <Brice.Goglin@xxxxxxxx> > Link: https://github.com/open-mpi/hwloc/issues/536 > Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > Link: https://lore.kernel.org/r/20220705190435.1790466-3-mail@xxxxxxxxxxx > Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx> > Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx> Hey Greg, I pointed out on the AUTOSEL'd version of these patches that adding the optional dt property papers over the problem rather than really fixing it & Sudeep suggested the time that these patches were not stable worthy, hence the lack of a CC: stable. The following has been merged into riscv/for-next & is pending for arm64/driver core as an actual fix for RISC-V's default topology reporting: https://lore.kernel.org/linux-riscv/4849490e-b362-c13a-c2e4-82acc3268a3f@xxxxxxxxxxxxx/#t As I said to Sasha, I defer to your (plural) better judgement here, but just so that you're aware of the context. Thanks, Conor. This would apply to the following 3 patches: riscv: dts: sifive: Add fu540 topology information riscv: dts: sifive: Add fu740 topology information riscv: dts: canaan: Add k210 topology information AUTOSEL comments: https://lore.kernel.org/stable/YwDwwEXgGundXB1X@sashalap/ > --- > arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 24 ++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi > index e3172d0ffac4..24bba83bec77 100644 > --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi > +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi > @@ -133,6 +133,30 @@ > interrupt-controller; > }; > }; > + > + cpu-map { > + cluster0 { > + core0 { > + cpu = <&cpu0>; > + }; > + > + core1 { > + cpu = <&cpu1>; > + }; > + > + core2 { > + cpu = <&cpu2>; > + }; > + > + core3 { > + cpu = <&cpu3>; > + }; > + > + core4 { > + cpu = <&cpu4>; > + }; > + }; > + }; > }; > soc { > #address-cells = <2>; > -- > 2.35.1 > > >
