On 2022/8/17 10:35, Lu Baolu wrote:
The Intel IOMMU driver possibly selects between the first-level and the
second-level translation tables for DMA address translation. However,
the levels of page-table walks for the 4KB base page size are calculated
from the SAGAW field of the capability register, which is only valid for
the second-level page table. This causes the IOMMU driver to stop working
if the hardware (or the emulated IOMMU) advertises only first-level
translation capability and reports the SAGAW field as 0.
This solves the above problem by considering both the first level and the
second level when calculating the supported page table levels.
Fixes: b802d070a52a1 ("iommu/vt-d: Use iova over first level")
Cc:stable@xxxxxxxxxxxxxxx
Signed-off-by: Lu Baolu<baolu.lu@xxxxxxxxxxxxxxx>
This patch has been queued:
https://lore.kernel.org/linux-iommu/20220823061557.1631056-1-baolu.lu@xxxxxxxxxxxxxxx/
Best regards,
baolu
