On 14/07/2022 13:06, Mauro Carvalho Chehab wrote:
From: Chris Wilson <chris.p.wilson@xxxxxxxxx>
Skip all further TLB invalidations once the device is wedged and
had been reset, as, on such cases, it can no longer process instructions
on the GPU and the user no longer has access to the TLB's in each engine.
That helps to reduce the performance regression introduced by TLB
invalidate logic.
Cc: stable@xxxxxxxxxxxxxxx
Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store")
Is the claim of a performance regression this solved based on a wedged
GPU which does not work any more to the extend where mmio tlb
invalidation requests keep timing out? If so please clarify in the
commit text and then it looks good to me. Even if it is IMO a very
borderline situation to declare something a fix.
Regards,
Tvrtko
Signed-off-by: Chris Wilson <chris.p.wilson@xxxxxxxxx>
Cc: Fei Yang <fei.yang@xxxxxxxxx>
Cc: Andi Shyti <andi.shyti@xxxxxxxxxxxxxxx>
Acked-by: Thomas Hellström <thomas.hellstrom@xxxxxxxxxxxxxxx>
Signed-off-by: Mauro Carvalho Chehab <mchehab@xxxxxxxxxx>
---
To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover.
See [PATCH v2 00/21] at: https://lore.kernel.org/all/cover.1657800199.git.mchehab@xxxxxxxxxx/
drivers/gpu/drm/i915/gt/intel_gt.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 1d84418e8676..5c55a90672f4 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -934,6 +934,9 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt)
if (I915_SELFTEST_ONLY(gt->awake == -ENODEV))
return;
+ if (intel_gt_is_wedged(gt))
+ return;
+
if (GRAPHICS_VER(i915) == 12) {
regs = gen12_regs;
num = ARRAY_SIZE(gen12_regs);
