On 24/05/2022 17:30, Florian Fainelli wrote:
...
Jonathan any chance this is Tegra specific? Our ARCH_BRCMSTB SoCs which
use a Brahma-B15 which uses nearly the same ca15 processor functions
defined in arch/arm/mm/proc-v7.S reports the following *before* changes:
[ 0.001641] CPU: Testing write buffer coherency: ok
[ 0.001685] CPU0: Spectre v2: using ICIALLU workaround
[ 0.001703] ftrace: allocating 30541 entries in 120 pages
[ 0.044600] CPU0: update cpu_capacity 1024
[ 0.044633] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.044662] Setting up static identity map for 0x200000 - 0x200060
[ 0.047410] brcmstb: biuctrl: MCP: Write pairing already disabled
[ 0.048974] CPU1: update cpu_capacity 1024
[ 0.048978] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.048981] CPU1: Spectre v2: using ICIALLU workaround
[ 0.050234] CPU2: update cpu_capacity 1024
[ 0.050238] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
[ 0.050241] CPU2: Spectre v2: using ICIALLU workaround
[ 0.051437] CPU3: update cpu_capacity 1024
[ 0.051441] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
[ 0.051444] CPU3: Spectre v2: using ICIALLU workaround
[ 0.051532] Brought up 4 CPUs
and this *after* merging 4.9.316-rc1:
[ 0.001626] CPU: Testing write buffer coherency: ok
[ 0.001670] CPU0: Spectre v2: using ICIALLU workaround
[ 0.001689] CPU0: Spectre BHB: using loop workaround
[ 0.001705] ftrace: allocating 30542 entries in 120 pages
[ 0.043752] CPU0: update cpu_capacity 1024
[ 0.043784] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[ 0.043813] Setting up static identity map for 0x200000 - 0x200060
[ 0.046547] brcmstb: biuctrl: MCP: Write pairing already disabled
[ 0.048121] CPU1: update cpu_capacity 1024
[ 0.048124] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[ 0.048129] CPU1: Spectre v2: using ICIALLU workaround
[ 0.048165] CPU1: Spectre BHB: using loop workaround
[ 0.049398] CPU2: update cpu_capacity 1024
[ 0.049402] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
[ 0.049405] CPU2: Spectre v2: using ICIALLU workaround
[ 0.049440] CPU2: Spectre BHB: using loop workaround
[ 0.050613] CPU3: update cpu_capacity 1024
[ 0.050617] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
[ 0.050619] CPU3: Spectre v2: using ICIALLU workaround
[ 0.050653] CPU3: Spectre BHB: using loop workaround
[ 0.050722] Brought up 4 CPUs
[ 0.050738] SMP: Total of 4 processors activated (216.00 BogoMIPS).
[ 0.050753] CPU: All CPU(s) started in HYP mode.
Does your platform support CPU idle? I see this being triggered
during CPU idle transitions ...
[ 4.415167] CPU0: Spectre BHB: using loop workaround
[ 4.417621] [<c01109a0>] (unwind_backtrace) from [<c010b7ac>] (show_stack+0x10/0x14)
[ 4.430291] [<c010b7ac>] (show_stack) from [<c09c2b38>] (dump_stack+0xc0/0xd4)
[ 4.437512] [<c09c2b38>] (dump_stack) from [<c011a6c8>] (cpu_v7_spectre_bhb_init+0xd8/0x190)
[ 4.445943] [<c011a6c8>] (cpu_v7_spectre_bhb_init) from [<c010dee8>] (cpu_suspend+0xac/0xc8)
[ 4.454377] [<c010dee8>] (cpu_suspend) from [<c011e7e4>] (tegra114_idle_power_down+0x74/0x78)
[ 4.462898] [<c011e7e4>] (tegra114_idle_power_down) from [<c06d3b44>] (cpuidle_enter_state+0x130/0x524)
[ 4.472286] [<c06d3b44>] (cpuidle_enter_state) from [<c0164a30>] (do_idle+0x1b0/0x200)
[ 4.480199] [<c0164a30>] (do_idle) from [<c0164d28>] (cpu_startup_entry+0x18/0x1c)
[ 4.487762] [<c0164d28>] (cpu_startup_entry) from [<801018cc>] (0x801018cc)
Jon
--
nvpublic
