On Mon, May 23, 2022 at 12:12:27PM +0200, Philippe Schenker wrote: > From: Abel Vesa <abel.vesa@xxxxxxx> > > commit 4cb7df64c732b2b9918424095c11660c2a8c4a33 upstream. > > The audio_mclk_root_clk was added as a gate with the CCGR121 (0x4790), > but according to the reference manual, there is no such gate. Moreover, > the consumer driver of the mentioned clock might gate it and leave > the ECSPI2 (the true owner of that gate) hanging. So lets use the > audio_mclk_post_div, which is the parent. > > Signed-off-by: Abel Vesa <abel.vesa@xxxxxxx> > Signed-off-by: Shawn Guo <shawnguo@xxxxxxxxxx> > [ps: backport to 5.4] > Signed-off-by: Philippe Schenker <philippe.schenker@xxxxxxxxxxx> Now queued up, thanks. greg k-h
