On Thu, 2022-04-21 at 19:22 +0300, Imre Deak wrote:
> Fix typo in the _SEL_FETCH_PLANE_BASE_1_B register base address.
>
Reviewed-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
> Fixes: a5523e2ff074a5 ("drm/i915: Add PSR2 selective fetch registers")
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/5400
> Cc: José Roberto de Souza <jose.souza@xxxxxxxxx>
> Cc: <stable@xxxxxxxxxxxxxxx> # v5.9+
> Signed-off-by: Imre Deak <imre.deak@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 04d86cb6224fc..0ca6517b4595a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5172,7 +5172,7 @@
> #define _SEL_FETCH_PLANE_BASE_6_A 0x70940
> #define _SEL_FETCH_PLANE_BASE_7_A 0x70960
> #define _SEL_FETCH_PLANE_BASE_CUR_A 0x70880
> -#define _SEL_FETCH_PLANE_BASE_1_B 0x70990
> +#define _SEL_FETCH_PLANE_BASE_1_B 0x71890
>
> #define _SEL_FETCH_PLANE_BASE_A(plane) _PICK(plane, \
> _SEL_FETCH_PLANE_BASE_1_A, \
