From: Richard Zhu <hongxing.zhu@xxxxxxx> [ Upstream commit 45514f78c65cc9a09437f20e180625f94f769863 ] The CLKREQ# signal is an open drain, active low signal that is driven low by the remote Endpoint device. But it might not be driven low if no Endpoint device is connected. On i.MX8MM PCIe, phy_init() may fail and system boot may hang if no Endpoint is connected to assert CLKREQ#. Handle this as on i.MX8MQ, where we explicitly assert CLKREQ# so the PHY can be initialized. Link: https://lore.kernel.org/r/1645672013-8949-1-git-send-email-hongxing.zhu@xxxxxxx Fixes: 178e244cb6e2 ("PCI: imx: Add the imx8mm pcie support") Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx> Reviewed-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx> Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx> --- drivers/pci/controller/dwc/pci-imx6.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 77fc510c6d0d..d09ad4e1f432 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -453,10 +453,6 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) case IMX7D: break; case IMX8MM: - ret = clk_prepare_enable(imx6_pcie->pcie_aux); - if (ret) - dev_err(dev, "unable to enable pcie_aux clock\n"); - break; case IMX8MQ: ret = clk_prepare_enable(imx6_pcie->pcie_aux); if (ret) { -- 2.34.1
