Patch "intel_pstate: Set CPU number before accessing MSRs" has been added to the 3.15-stable tree

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This is a note to let you know that I've just added the patch titled

    intel_pstate: Set CPU number before accessing MSRs

to the 3.15-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     intel_pstate-set-cpu-number-before-accessing-msrs.patch
and it can be found in the queue-3.15 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From 179e8471673ce0249cd4ecda796008f7757e5bad Mon Sep 17 00:00:00 2001
From: Vincent Minet <vincent@xxxxxxxxxxxxxxxxx>
Date: Sat, 5 Jul 2014 01:51:33 +0200
Subject: intel_pstate: Set CPU number before accessing MSRs

From: Vincent Minet <vincent@xxxxxxxxxxxxxxxxx>

commit 179e8471673ce0249cd4ecda796008f7757e5bad upstream.

Ensure that cpu->cpu is set before writing MSR_IA32_PERF_CTL during CPU
initialization. Otherwise only cpu0 has its P-state set and all other
cores are left with their values unchanged.

In most cases, this is not too serious because the P-states will be set
correctly when the timer function is run.  But when the default governor
is set to performance, the per-CPU current_pstate stays the same forever
and no attempts are made to write the MSRs again.

Signed-off-by: Vincent Minet <vincent@xxxxxxxxxxxxxxxxx>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@xxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
 drivers/cpufreq/intel_pstate.c |    3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -709,9 +709,8 @@ static int intel_pstate_init_cpu(unsigne
 
 	cpu = all_cpu_data[cpunum];
 
-	intel_pstate_get_cpu_pstates(cpu);
-
 	cpu->cpu = cpunum;
+	intel_pstate_get_cpu_pstates(cpu);
 
 	init_timer_deferrable(&cpu->timer);
 	cpu->timer.function = intel_pstate_timer_func;


Patches currently in stable-queue which might be from vincent@xxxxxxxxxxxxxxxxx are

queue-3.15/intel_pstate-set-cpu-number-before-accessing-msrs.patch
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