On 2022/02/28 8:37, gregkh@xxxxxxxxxxxxxxxxxxx wrote:
>
> The patch below does not apply to the 5.15-stable tree.
> If someone wants it applied there, or to any other stable or longterm
> tree, then please email the backport, including the original git commit
> id to <stable@xxxxxxxxxxxxxxx>.
>
> thanks,
Sergey,
Can you send the proper backports to Greg ? I am traveling this week and will
not have time to do it.
Thanks.
>
> greg k-h
>
> ------------------ original commit in Linus's tree ------------------
>
> From 5f6b0f2d037c8864f20ff15311c695f65eb09db5 Mon Sep 17 00:00:00 2001
> From: Sergey Shtylyov <s.shtylyov@xxxxxx>
> Date: Sat, 19 Feb 2022 23:04:29 +0300
> Subject: [PATCH] ata: pata_hpt37x: fix PCI clock detection
>
> The f_CNT register (at the PCI config. address 0x78) is 16-bit, not
> 8-bit! The bug was there from the very start... :-(
>
> Signed-off-by: Sergey Shtylyov <s.shtylyov@xxxxxx>
> Fixes: 669a5db411d8 ("[libata] Add a bunch of PATA drivers.")
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Damien Le Moal <damien.lemoal@xxxxxxxxxxxxxxxxxx>
>
> diff --git a/drivers/ata/pata_hpt37x.c b/drivers/ata/pata_hpt37x.c
> index 7abc7e04f656..1baaca7b72ed 100644
> --- a/drivers/ata/pata_hpt37x.c
> +++ b/drivers/ata/pata_hpt37x.c
> @@ -950,14 +950,14 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id)
>
> if ((freq >> 12) != 0xABCDE) {
> int i;
> - u8 sr;
> + u16 sr;
> u32 total = 0;
>
> dev_warn(&dev->dev, "BIOS has not set timing clocks\n");
>
> /* This is the process the HPT371 BIOS is reported to use */
> for (i = 0; i < 128; i++) {
> - pci_read_config_byte(dev, 0x78, &sr);
> + pci_read_config_word(dev, 0x78, &sr);
> total += sr & 0x1FF;
> udelay(15);
> }
>
--
Damien Le Moal
Western Digital Research
