This is a note to let you know that I've just added the patch titled
ARM: mvebu: mvebu-soc-id: keep clock enabled if PCIe unit is enabled
to the 3.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm-mvebu-mvebu-soc-id-keep-clock-enabled-if-pcie-unit-is-enabled.patch
and it can be found in the queue-3.14 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From b25bcf1bcaf6687991ae08dd76cd784bf9fe3d05 Mon Sep 17 00:00:00 2001
From: Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxxxxxxxxx>
Date: Mon, 12 May 2014 16:11:40 +0200
Subject: ARM: mvebu: mvebu-soc-id: keep clock enabled if PCIe unit is enabled
From: Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxxxxxxxxx>
commit b25bcf1bcaf6687991ae08dd76cd784bf9fe3d05 upstream.
Since the mvebu-soc-id code in mach-mvebu/ was introduced, several
users have noticed a regression: the PCIe card connected in the first
PCIe interface is not detected properly.
This is due to the fact that the mvebu-soc-id code enables the PCIe
clock of the first PCIe interface, reads the SoC device ID and
revision number (yes this information is made available as part of
PCIe registers), and then disables the clock. However, by doing this,
we gate the clock and therefore loose the complex PCIe configuration
that was done by the bootloader.
Unfortunately, as of today, the kernel is not capable of doing this
complex configuration by itself, so we really need to keep the PCIe
clock enabled. However, we don't want to keep it enabled
unconditionally: if the PCIe interface is not enabled or PCI support
is not compiled into the kernel, there is no reason to keep the PCIe
clock running.
This issue was discussed with Kevin Hilman, and the suggested solution
was to make the mvebu-soc-id code keep the clock enabled in case it
will be needed for PCIe. This is therefore the solution implemented in
this patch.
Long term, we hope to make the kernel more capable in terms of PCIe
configuration for this platform, which will anyway be needed to
support the compilation of the PCIe host controller driver as a
module. In the mean time however, we don't have much other choice than
to implement the currently proposed solution.
Reported-by: Neil Greatorex <neil@xxxxxxxxxxxxxxx>
Cc: Neil Greatorex <neil@xxxxxxxxxxxxxxx>
Cc: Jason Gunthorpe <jgunthorpe@xxxxxxxxxxxxxxxxxxxx>
Cc: Kevin Hilman <khilman@xxxxxxxxxx>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxxxxxxxxx>
Link: https://lkml.kernel.org/r/1399903900-29977-3-git-send-email-thomas.petazzoni@xxxxxxxxxxxxxxxxxx
Fixes: af8d1c63afcb ("ARM: mvebu: Add support to get the ID and the revision of a SoC")
Acked-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxxxxxxxxx>
Tested-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxxxxxxxxx>
Tested-by: Andrew Lunn <andrew@xxxxxxx>
Tested-by: Willy Tarreau <w@xxxxxx>
Signed-off-by: Jason Cooper <jason@xxxxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/arm/mach-mvebu/mvebu-soc-id.c | 14 ++++++++++++--
1 file changed, 12 insertions(+), 2 deletions(-)
--- a/arch/arm/mach-mvebu/mvebu-soc-id.c
+++ b/arch/arm/mach-mvebu/mvebu-soc-id.c
@@ -107,8 +107,18 @@ static int __init mvebu_soc_id_init(void
iounmap(pci_base);
res_ioremap:
- clk_disable_unprepare(clk);
- clk_put(clk);
+ /*
+ * If the PCIe unit is actually enabled and we have PCI
+ * support in the kernel, we intentionally do not release the
+ * reference to the clock. We want to keep it running since
+ * the bootloader does some PCIe link configuration that the
+ * kernel is for now unable to do, and gating the clock would
+ * make us loose this precious configuration.
+ */
+ if (!of_device_is_available(child) || !IS_ENABLED(CONFIG_PCI_MVEBU)) {
+ clk_disable_unprepare(clk);
+ clk_put(clk);
+ }
clk_err:
of_node_put(child);
Patches currently in stable-queue which might be from thomas.petazzoni@xxxxxxxxxxxxxxxxxx are
queue-3.14/pci-mvebu-fix-off-by-one-in-the-computed-size-of-the-mbus-windows.patch
queue-3.14/arm-orion5x-fix-target-id-for-crypto-sram-window.patch
queue-3.14/arm-mvebu-fix-nor-bus-width-in-armada-xp-db-device-tree.patch
queue-3.14/arm-mvebu-mvebu-soc-id-keep-clock-enabled-if-pcie-unit-is-enabled.patch
queue-3.14/irqchip-armada-370-xp-fix-releasing-of-msis.patch
queue-3.14/pci-mvebu-split-pcie-bars-into-multiple-mbus-windows-when-needed.patch
queue-3.14/memory-mvebu-devbus-fix-the-conversion-of-the-bus-width.patch
queue-3.14/irqchip-armada-370-xp-implement-the-check_device-msi_chip-operation.patch
queue-3.14/arm-mvebu-mvebu-soc-id-add-missing-clk_put-call.patch
queue-3.14/irqchip-armada-370-xp-fix-invalid-cast-of-signed-value-into-unsigned-variable.patch
queue-3.14/bus-mvebu-mbus-allow-several-windows-with-the-same-target-attribute.patch
queue-3.14/arm-mvebu-fix-nor-bus-width-in-armada-xp-gp-device-tree.patch
queue-3.14/arm-mvebu-fix-nor-bus-width-in-armada-xp-openblocks-ax3-device-tree.patch
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