Patch "ARM: orion5x: fix target ID for crypto SRAM window" has been added to the 3.14-stable tree

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This is a note to let you know that I've just added the patch titled

    ARM: orion5x: fix target ID for crypto SRAM window

to the 3.14-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm-orion5x-fix-target-id-for-crypto-sram-window.patch
and it can be found in the queue-3.14 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From 1cc9d48145b81e307fab94a5cf6ee66ec2f0de60 Mon Sep 17 00:00:00 2001
From: Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxxxxxxxxx>
Date: Sun, 13 Apr 2014 16:39:38 +0200
Subject: ARM: orion5x: fix target ID for crypto SRAM window

From: Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxxxxxxxxx>

commit 1cc9d48145b81e307fab94a5cf6ee66ec2f0de60 upstream.

In commit 4ca2c04085a1caa903e92a5fc0da25362150aac2 ('ARM: orion5x:
Move to ID based window creation'), the mach-orion5x code was changed
to use the new mvebu-mbus API. However, in the process, a mistake was
made on the crypto SRAM window target ID: it should have been 0x9
(verified in the datasheet) and not 0x0.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@xxxxxxxxxxxxxxxxxx>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@xxxxxxxxx>
Link: https://lkml.kernel.org/r/1397400006-4315-2-git-send-email-thomas.petazzoni@xxxxxxxxxxxxxxxxxx
Fixes: 4ca2c04085a1 ('ARM: orion5x: Move to ID based window creation')
Signed-off-by: Jason Cooper <jason@xxxxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
 arch/arm/mach-orion5x/common.h |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -21,7 +21,7 @@ struct mv_sata_platform_data;
 #define ORION_MBUS_DEVBUS_BOOT_ATTR   0x0f
 #define ORION_MBUS_DEVBUS_TARGET(cs)  0x01
 #define ORION_MBUS_DEVBUS_ATTR(cs)    (~(1 << cs))
-#define ORION_MBUS_SRAM_TARGET        0x00
+#define ORION_MBUS_SRAM_TARGET        0x09
 #define ORION_MBUS_SRAM_ATTR          0x00
 
 /*


Patches currently in stable-queue which might be from thomas.petazzoni@xxxxxxxxxxxxxxxxxx are

queue-3.14/arm-mvebu-fix-nor-bus-width-in-armada-xp-db-device-tree.patch
queue-3.14/irqchip-armada-370-xp-fix-releasing-of-msis.patch
queue-3.14/arm-mvebu-fix-nor-bus-width-in-armada-xp-openblocks-ax3-device-tree.patch
queue-3.14/arm-mvebu-fix-nor-bus-width-in-armada-xp-gp-device-tree.patch
queue-3.14/irqchip-armada-370-xp-implement-the-check_device-msi_chip-operation.patch
queue-3.14/irqchip-armada-370-xp-fix-invalid-cast-of-signed-value-into-unsigned-variable.patch
queue-3.14/arm-orion5x-fix-target-id-for-crypto-sram-window.patch
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