Re: MIPS: Hibernate: Flush TLB entries in swsusp_arch_resume()

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Hi,

FYI, commit 771004298d9a73ff1bca0b4ff5168c74d3ff7af0 (trunk) AKA
c14af233fbe279d0e561ecf84f1208b1bae087ef (3.14.4) regressed wake up
after hibernation on yeeloong.  Reverting this one patch restores the
ability to hibernate and resume.

Unfortunately, I can't catch the first OOPS message, it scrolls by too
fast, and the last one that remains is too late to figure out what the
exact problem is.

Now, considering that this has been added and removed more than once
already, should this be conditional on CPU type or somesuch?

-- 
Alexandre Oliva, freedom fighter    http://FSFLA.org/~lxoliva/
You must be the change you wish to see in the world. -- Gandhi
Be Free! -- http://FSFLA.org/   FSF Latin America board member
Free Software Evangelist|Red Hat Brasil GNU Toolchain Engineer
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