On Tue, 16 Mar 2021 18:33:53 +0000, Suzuki K Poulose <suzuki.poulose@xxxxxxx> wrote: > > commit b96b0c5de685df82019e16826a282d53d86d112c upstream > > The nVHE KVM hyp drains and disables the SPE buffer, before > entering the guest, as the EL1&0 translation regime > is going to be loaded with that of the guest. > > But this operation is performed way too late, because : > - The owning translation regime of the SPE buffer > is transferred to EL2. (MDCR_EL2_E2PB == 0) > - The guest Stage1 is loaded. > > Thus the flush could use the host EL1 virtual address, > but use the EL2 translations instead of host EL1, for writing > out any cached data. > > Fix this by moving the SPE buffer handling early enough. > The restore path is doing the right thing. > > Cc: stable@xxxxxxxxxxxxxxx # v5.4- > Cc: Christoffer Dall <christoffer.dall@xxxxxxx> > Cc: Marc Zyngier <maz@xxxxxxxxxx> > Cc: Will Deacon <will@xxxxxxxxxx> > Cc: Catalin Marinas <catalin.marinas@xxxxxxx> > Cc: Mark Rutland <mark.rutland@xxxxxxx> > Cc: Alexandru Elisei <alexandru.elisei@xxxxxxx> > Signed-off-by: Suzuki K Poulose <suzuki.poulose@xxxxxxx> Acked-by: Marc Zyngier <maz@xxxxxxxxxx> Thanks, M. -- Without deviation from the norm, progress is not possible.
