On 2021-01-28 07:03, Stephen Boyd wrote:
Quoting Sai Prakash Ranjan (2021-01-26 07:02:41)
As per register documentation, QCOM_WDT_ENABLE_IRQ which is BIT(1)
of watchdog control register is wakeup interrupt enable bit and
not related to bark interrupt at all, BIT(0) is used for that.
So remove incorrect usage of this bit when supporting bark irq for
pre-timeout notification. Currently with this bit set and bark
interrupt specified, pre-timeout notification and/or watchdog
reset/bite does not occur.
It looks like the QCOM_WDT_ENABLE_IRQ bit is to catch a problem where a
pending irq is unmasked but the watchdog irq isn't handled in time? So
some sort of irq storm?
In sleep mode, this bit is used to enable unmasked irq to wakeup
watchdog timer. The watchdog counter can be brought out of
reset either by writing 1 to WDOG_RESET or setting this BIT(1) to 1.
Fixes: 36375491a439 ("watchdog: qcom: support pre-timeout when the
bark irq is available")
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@xxxxxxxxxxxxxx>
---
Reviewed-by: Stephen Boyd <swboyd@xxxxxxxxxxxx>
Thanks,
Sai
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