This is a note to let you know that I've just added the patch titled
PCI: designware: Fix RC BAR to be single 64-bit non-prefetchable memory BAR
to the 3.13-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
pci-designware-fix-rc-bar-to-be-single-64-bit-non-prefetchable-memory-bar.patch
and it can be found in the queue-3.13 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From dbffdd6862e67d60703f2df66c558bf448f81d6e Mon Sep 17 00:00:00 2001
From: Mohit Kumar <mohit.kumar@xxxxxx>
Date: Wed, 19 Feb 2014 17:34:35 +0530
Subject: PCI: designware: Fix RC BAR to be single 64-bit non-prefetchable memory BAR
From: Mohit Kumar <mohit.kumar@xxxxxx>
commit dbffdd6862e67d60703f2df66c558bf448f81d6e upstream.
The Synopsys PCIe core provides one pair of 32-bit BARs (BAR 0 and BAR 1).
The BARs can be configured as follows:
- One 64-bit BAR: BARs 0 and 1 are combined to form a single 64-bit BAR
- Two 32-bit BARs: BARs 0 and 1 are two independent 32-bit BARs
This patch corrects 64-bit, non-prefetchable memory BAR configuration
implemented in dw driver.
Signed-off-by: Mohit Kumar <mohit.kumar@xxxxxx>
Signed-off-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
Cc: Pratyush Anand <pratyush.anand@xxxxxx>
Cc: Jingoo Han <jg1.han@xxxxxxxxxxx>
Cc: Arnd Bergmann <arnd@xxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
drivers/pci/host/pcie-designware.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -773,7 +773,7 @@ void dw_pcie_setup_rc(struct pcie_port *
/* setup RC BARs */
dw_pcie_writel_rc(pp, 0x00000004, PCI_BASE_ADDRESS_0);
- dw_pcie_writel_rc(pp, 0x00000004, PCI_BASE_ADDRESS_1);
+ dw_pcie_writel_rc(pp, 0x00000000, PCI_BASE_ADDRESS_1);
/* setup interrupt pins */
dw_pcie_readl_rc(pp, PCI_INTERRUPT_LINE, &val);
Patches currently in stable-queue which might be from mohit.kumar@xxxxxx are
queue-3.13/pci-designware-fix-rc-bar-to-be-single-64-bit-non-prefetchable-memory-bar.patch
queue-3.13/pci-designware-fix-iatu-programming-for-cfg1-io-and-mem-viewport.patch
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