From: Stephen Boyd <swboyd@xxxxxxxxxxxx> [ Upstream commit 51e9874d382e089f664b3ce12773bbbaece5f369 ] The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two where the second cell is the irq flags. Drop the second cell to match the binding. Cc: Kalyan Thota <kalyan_t@xxxxxxxxxxxxxx> Cc: Harigovindan P <harigovi@xxxxxxxxxxxxxx Fixes: a3db7ad1af49 ("arm64: dts: sc7180: add display dt nodes") Signed-off-by: Stephen Boyd <swboyd@xxxxxxxxxxxx> Link: https://lore.kernel.org/r/20200811192503.1811462-1-swboyd@xxxxxxxxxxxx Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index e875f6c3b6639..a6be72d8f6fde 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2785,7 +2785,7 @@ mdp: mdp@ae01000 { power-domains = <&rpmhpd SC7180_CX>; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; status = "disabled"; @@ -2833,7 +2833,7 @@ dsi0: dsi@ae94000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, -- 2.25.1