Hi! > Because of out-of-order execution about some CPU architecture, > In this debug stage we find Completing spi interrupt enable -> > prodrucing TXEI interrupt -> running "interrupt_transfer" function > will prior to set "dw->rx and dws->rx_end" data, so this patch add > memory barrier to enable dw->rx and dw->rx_end to be visible and > solve to send SPI data error. So, this is apparently CPU-vs-device issue... > +++ b/drivers/spi/spi-dw.c > @@ -304,6 +304,9 @@ static int dw_spi_transfer_one(struct spi_controller *master, > dws->len = transfer->len; > spin_unlock_irqrestore(&dws->buf_lock, flags); > > + /* Ensure dw->rx and dw->rx_end are visible */ > + smp_mb(); > + But we use SMP-only memory barrier, thus the bug will still be there in single-processor configurations. Should this be mb()? Best regards, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
Attachment:
signature.asc
Description: Digital signature
