On Sat, Dec 21, 2019 at 11:49:48AM +0100, Daniel Wagner wrote:
> From: Arnd Bergmann <arnd@xxxxxxxx>
>
> [ Upstream commit 84092996673211f16ef3b942a191d7952e9dfea9 ]
>
> The davinci_cpdma mixes up physical addresses as seen from the CPU
> and DMA addresses as seen from a DMA master, since it can operate
> on both normal memory or an on-chip buffer. If dma_addr_t is
> different from phys_addr_t, this means we get a compile-time warning
> about the type mismatch:
>
> ethernet/ti/davinci_cpdma.c: In function 'cpdma_desc_pool_create':
> ethernet/ti/davinci_cpdma.c:182:48: error: passing argument 3 of 'dma_alloc_coherent' from incompatible pointer type [-Werror=incompatible-pointer-types]
> pool->cpumap = dma_alloc_coherent(dev, size, &pool->phys,
> In file included from ethernet/ti/davinci_cpdma.c:21:0:
> dma-mapping.h:398:21: note: expected 'dma_addr_t * {aka long long unsigned int *}' but argument is of type 'phys_addr_t * {aka unsigned int *}'
> static inline void *dma_alloc_coherent(struct device *dev, size_t size,
>
> This slightly restructures the code so the address we use for
> mapping RAM into a DMA address is always a dma_addr_t, avoiding
> the warning. The code is correct even if both types are 32-bit
> because the DMA master in this device only supports 32-bit addressing
> anyway, independent of the types that are used.
>
> We still assign this value to pool->phys, and that is wrong if
> the driver is ever used with an IOMMU, but that value appears to
> be never used, so there is no problem really. I've added a couple
> of comments about where we do things that are slightly violating
> the API.
>
> Signed-off-by: Arnd Bergmann <arnd@xxxxxxxx>
> Signed-off-by: David S. Miller <davem@xxxxxxxxxxxxx>
> Signed-off-by: Daniel Wagner <dwagner@xxxxxxx>
> ---
>
> Hi,
>
> Pavel reported this fix is needed for the CIP kernel.
>
> Since this patch was added to v4.5, we only need to backport
> to v4.4.
Now queued up, thanks.
greg k-h
