Patch "drm/radeon: fix DAC interrupt handling on DCE5+" has been added to the 3.12-stable tree

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This is a note to let you know that I've just added the patch titled

    drm/radeon: fix DAC interrupt handling on DCE5+

to the 3.12-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     drm-radeon-fix-dac-interrupt-handling-on-dce5.patch
and it can be found in the queue-3.12 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From e9a321c6b2ac954a7dbf235f419c255a424a1273 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexander.deucher@xxxxxxx>
Date: Mon, 27 Jan 2014 11:54:44 -0500
Subject: drm/radeon: fix DAC interrupt handling on DCE5+

From: Alex Deucher <alexander.deucher@xxxxxxx>

commit e9a321c6b2ac954a7dbf235f419c255a424a1273 upstream.

DCE5 and newer hardware only has 1 DAC.  Use the correct
offset.  This may fix display problems on certain board
configurations.

Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
 drivers/gpu/drm/radeon/evergreen.c |    4 ++--
 drivers/gpu/drm/radeon/si.c        |    2 +-
 drivers/gpu/drm/radeon/sid.h       |    2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -4249,8 +4249,8 @@ void evergreen_disable_interrupt_state(s
 		WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, 0);
 	}
 
-	/* only one DAC on DCE6 */
-	if (!ASIC_IS_DCE6(rdev))
+	/* only one DAC on DCE5 */
+	if (!ASIC_IS_DCE5(rdev))
 		WREG32(DACA_AUTODETECT_INT_CONTROL, 0);
 	WREG32(DACB_AUTODETECT_INT_CONTROL, 0);
 
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -5625,7 +5625,7 @@ static void si_disable_interrupt_state(s
 	}
 
 	if (!ASIC_IS_NODCE(rdev)) {
-		WREG32(DACA_AUTODETECT_INT_CONTROL, 0);
+		WREG32(DAC_AUTODETECT_INT_CONTROL, 0);
 
 		tmp = RREG32(DC_HPD1_INT_CONTROL) & DC_HPDx_INT_POLARITY;
 		WREG32(DC_HPD1_INT_CONTROL, tmp);
--- a/drivers/gpu/drm/radeon/sid.h
+++ b/drivers/gpu/drm/radeon/sid.h
@@ -770,7 +770,7 @@
 #       define GRPH_PFLIP_INT_MASK                      (1 << 0)
 #       define GRPH_PFLIP_INT_TYPE                      (1 << 8)
 
-#define	DACA_AUTODETECT_INT_CONTROL			0x66c8
+#define	DAC_AUTODETECT_INT_CONTROL			0x67c8
 
 #define DC_HPD1_INT_STATUS                              0x601c
 #define DC_HPD2_INT_STATUS                              0x6028


Patches currently in stable-queue which might be from alexander.deucher@xxxxxxx are

queue-3.12/drm-radeon-skip-colorbuffer-checking-if-color_info.format-is-set-to-invalid.patch
queue-3.12/drm-radeon-dce4-clear-bios-scratch-dpms-bit-v2.patch
queue-3.12/drm-radeon-warn-users-when-hw_i2c-is-enabled-v2.patch
queue-3.12/drm-radeon-add-uvd-support-for-oland.patch
queue-3.12/drm-radeon-dce8-workaround-for-atom-blankcrtc-table.patch
queue-3.12/radeon-pm-guard-access-to-rdev-pm.power_state-array.patch
queue-3.12/drm-radeon-fix-surface-sync-in-fence-on-cayman-v2.patch
queue-3.12/drm-radeon-set-the-full-cache-bit-for-fences-on-r7xx.patch
queue-3.12/drm-radeon-fix-dac-interrupt-handling-on-dce5.patch
queue-3.12/drm-radeon-disable-ss-on-dp-for-dce3.x.patch
queue-3.12/drm-radeon-dpm-disable-mclk-switching-on-desktop-rv770.patch
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