On Tue, Oct 29, 2019 at 06:50:38PM +0800, Jiaxun Yang wrote: > > 在 2019/10/28 上午5:00, Greg Kroah-Hartman 写道: > > From: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> > > > > [ Upstream commit 38dffe1e4dde1d3174fdce09d67370412843ebb5 ] > > > > A Golang developer reported MIPS hwcap isn't reflecting instructions > > that the processor actually supported so programs can't apply optimized > > code at runtime. > > > > Thus we export the ASEs that can be used in userspace programs. > > > > Reported-by: Meng Zhuo <mengzhuo1203@xxxxxxxxx> > > Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> > > Cc: linux-mips@xxxxxxxxxxxxxxx > > Cc: Paul Burton <paul.burton@xxxxxxxx> > > Cc: <stable@xxxxxxxxxxxxxxx> # 4.14+ > > Signed-off-by: Paul Burton <paul.burton@xxxxxxxx> > > Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx> > > --- > > arch/mips/include/uapi/asm/hwcap.h | 11 ++++++++++ > > arch/mips/kernel/cpu-probe.c | 33 ++++++++++++++++++++++++++++++ > > 2 files changed, 44 insertions(+) > > > > diff --git a/arch/mips/include/uapi/asm/hwcap.h b/arch/mips/include/uapi/asm/hwcap.h > > index 600ad8fd68356..2475294c3d185 100644 > > --- a/arch/mips/include/uapi/asm/hwcap.h > > +++ b/arch/mips/include/uapi/asm/hwcap.h > > @@ -5,5 +5,16 @@ > > /* HWCAP flags */ > > #define HWCAP_MIPS_R6 (1 << 0) > > #define HWCAP_MIPS_MSA (1 << 1) > > +#define HWCAP_MIPS_MIPS16 (1 << 3) > > +#define HWCAP_MIPS_MDMX (1 << 4) > > +#define HWCAP_MIPS_MIPS3D (1 << 5) > > +#define HWCAP_MIPS_SMARTMIPS (1 << 6) > > +#define HWCAP_MIPS_DSP (1 << 7) > > +#define HWCAP_MIPS_DSP2 (1 << 8) > > +#define HWCAP_MIPS_DSP3 (1 << 9) > > +#define HWCAP_MIPS_MIPS16E2 (1 << 10) > > +#define HWCAP_LOONGSON_MMI (1 << 11) > > +#define HWCAP_LOONGSON_EXT (1 << 12) > > +#define HWCAP_LOONGSON_EXT2 (1 << 13) > > #endif /* _UAPI_ASM_HWCAP_H */ > > diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c > > index 3007ae1bb616a..c38cd62879f4e 100644 > > --- a/arch/mips/kernel/cpu-probe.c > > +++ b/arch/mips/kernel/cpu-probe.c > > @@ -2080,6 +2080,39 @@ void cpu_probe(void) > > elf_hwcap |= HWCAP_MIPS_MSA; > > } > > + if (cpu_has_mips16) > > + elf_hwcap |= HWCAP_MIPS_MIPS16; > > + > > + if (cpu_has_mdmx) > > + elf_hwcap |= HWCAP_MIPS_MDMX; > > + > > + if (cpu_has_mips3d) > > + elf_hwcap |= HWCAP_MIPS_MIPS3D; > > + > > + if (cpu_has_smartmips) > > + elf_hwcap |= HWCAP_MIPS_SMARTMIPS; > > + > > + if (cpu_has_dsp) > > + elf_hwcap |= HWCAP_MIPS_DSP; > > + > > + if (cpu_has_dsp2) > > + elf_hwcap |= HWCAP_MIPS_DSP2; > > + > > + if (cpu_has_dsp3) > > + elf_hwcap |= HWCAP_MIPS_DSP3; > > + > > + if (cpu_has_loongson_mmi) > > + elf_hwcap |= HWCAP_LOONGSON_MMI; > > + > > + if (cpu_has_loongson_mmi) > > + elf_hwcap |= HWCAP_LOONGSON_CAM; > > Hi: > > Sorry, there is a typo causing build failure. > > Should be: Can you resend this in a format we can apply it in? thanks, greg k-h
