Hello!
On 10/08/2019 01:18 PM, Yoshihiro Shimoda wrote:
> According to the R-Car Gen2/3 manual, the bit 0 of MACCTLR register
> should be written by 0. To avoid unexpected behaviors from this
s/by/to/. I'd also mention that this bit is set to 1 on reset.
> incorrect setting, this patch fixes it.
>
> Fixes: b3327f7fae66 ("PCI: rcar: Try increasing PCIe link speed to 5 GT/s at boot")
> Cc: <stable@xxxxxxxxxxxxxxx> # v4.9+
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx>
Reviewed-by: Sergei Shtylyov <sergei.shtylyov@xxxxxxxxxxxxxxxxxx>
[...]
MBR, Sergei
