On Sat, 2019-09-14 at 09:46 +0200, Christophe Leroy wrote: > > Le 03/09/2019 à 07:23, Alastair D'Silva a écrit : > > From: Alastair D'Silva <alastair@xxxxxxxxxxx> > > > > When calling flush_icache_range with a size >4GB, we were masking > > off the upper 32 bits, so we would incorrectly flush a range > > smaller > > than intended. > > > > This patch replaces the 32 bit shifts with 64 bit ones, so that > > the full size is accounted for. > > Isn't there the same issue in arch/powerpc/kernel/vdso64/cacheflush.S > ? > > Christophe Yes, there is. I'll fix it, but I wonder whether anything calls it? I asked Google, and every mention of it was in the kernel source or mailing list. Maybe BenH can chime in? -- Alastair D'Silva Open Source Developer Linux Technology Centre, IBM Australia mob: 0423 762 819
