[PATCH 1/4] xtensa: save a4 in spill_registers

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Without this fix the value of a0 spilled from the oldest live window is
wrong if the newest window has only 4 live registers, because a4 in the
newest window overlaps a0 in the oldest one.

This may be reproduced by invoking spill syscall after the following
sequence of calls: 4 -> 12 -> 12 -> 4 on configuration with 32 physical
registers.

Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Max Filippov <jcmvbkbc@xxxxxxxxx>
---
 arch/xtensa/kernel/entry.S | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index 21dbe6b..80b3eea 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -1241,6 +1241,7 @@ ENTRY(_spill_registers)
 	 * Rotate ws right so that a4 = yyxxxwww1.
 	 */
 
+	wsr	a4, depc 		# save a4: we may need to spill it
 	rsr	a4, windowbase
 	rsr	a3, windowstart		# a3 = xxxwww1yy
 	ssr	a4			# holds WB
@@ -1271,6 +1272,7 @@ ENTRY(_spill_registers)
 
 	rsr	a3, windowbase
 	add	a3, a3, a4
+	rsr	a4, depc		# restore a4
 	wsr	a3, windowbase
 	rsync
 
-- 
1.8.1.4

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