[ Upstream commit fc9babc2574691d3bbf0428f007b22261fed55c6 ] We're adjusting the timer's base for each per-CPU timer to point to the actual start of the timer since device-tree defines a compound registers range that includes all of the timers. In this case the original base need to be restore before calling iounmap to unmap the proper address. Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx> Acked-by: Jon Hunter <jonathanh@xxxxxxxxxx> Acked-by: Thierry Reding <treding@xxxxxxxxxx> Signed-off-by: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx> Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx> --- drivers/clocksource/timer-tegra20.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/clocksource/timer-tegra20.c b/drivers/clocksource/timer-tegra20.c index fe5cc0963ac9..462be34b41c4 100644 --- a/drivers/clocksource/timer-tegra20.c +++ b/drivers/clocksource/timer-tegra20.c @@ -319,6 +319,8 @@ static int __init tegra_init_timer(struct device_node *np) irq_dispose_mapping(cpu_to->clkevt.irq); } } + + to->of_base.base = timer_reg_base; out: timer_of_cleanup(to); return ret; -- 2.20.1
