Quoting Peng Fan (2019-07-14 19:55:43)
> From: Peng Fan <peng.fan@xxxxxxx>
>
> The AUDIO PLL max support 650M, so the original clk settings violate
> spec. This patch makes the output 786432000 -> 393216000,
> and 722534400 -> 361267200 to aligned with NXP vendor kernel without any
> impact on audio functionality and go within 650MHz PLL limit.
>
> Cc: <stable@xxxxxxxxxxxxxxx>
> Fixes: ba5625c3e272 ("clk: imx: Add clock driver support for imx8mm")
> Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
> ---
Is this a problem right now, i.e. should I apply this to clk-fixes? Or
can this wait until next merge window?
