This is a note to let you know that I've just added the patch titled
arm64: Do not flush the D-cache for anonymous pages
to the 3.10-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
arm64-do-not-flush-the-d-cache-for-anonymous-pages.patch
and it can be found in the queue-3.10 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.
>From 7249b79f6b4cc3c2aa9138dca52e535a4c789107 Mon Sep 17 00:00:00 2001
From: Catalin Marinas <catalin.marinas@xxxxxxx>
Date: Wed, 1 May 2013 16:34:22 +0100
Subject: arm64: Do not flush the D-cache for anonymous pages
From: Catalin Marinas <catalin.marinas@xxxxxxx>
commit 7249b79f6b4cc3c2aa9138dca52e535a4c789107 upstream.
The D-cache on AArch64 is VIPT non-aliasing, so there is no need to
flush it for anonymous pages.
Signed-off-by: Catalin Marinas <catalin.marinas@xxxxxxx>
Reported-by: Will Deacon <will.deacon@xxxxxxx>
Acked-by: Will Deacon <will.deacon@xxxxxxx>
Cc: Mark Brown <broonie@xxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>
---
arch/arm64/mm/flush.c | 8 +++-----
arch/arm64/mm/mmu.c | 1 -
2 files changed, 3 insertions(+), 6 deletions(-)
--- a/arch/arm64/mm/flush.c
+++ b/arch/arm64/mm/flush.c
@@ -77,14 +77,12 @@ void __flush_dcache_page(struct page *pa
void __sync_icache_dcache(pte_t pte, unsigned long addr)
{
- unsigned long pfn;
- struct page *page;
+ struct page *page = pte_page(pte);
- pfn = pte_pfn(pte);
- if (!pfn_valid(pfn))
+ /* no flushing needed for anonymous pages */
+ if (!page_mapping(page))
return;
- page = pfn_to_page(pfn);
if (!test_and_set_bit(PG_dcache_clean, &page->flags)) {
__flush_dcache_page(page);
__flush_icache_all();
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -339,7 +339,6 @@ void __init paging_init(void)
bootmem_init();
empty_zero_page = virt_to_page(zero_page);
- __flush_dcache_page(empty_zero_page);
/*
* TTBR0 is only used for the identity mapping at this stage. Make it
Patches currently in stable-queue which might be from catalin.marinas@xxxxxxx are
queue-3.10/arm64-dts-reserve-the-memory-used-for-secondary-cpu-release-address.patch
queue-3.10/arm64-only-enable-local-interrupts-after-the-cpu-is-marked-online.patch
queue-3.10/arm64-virt-ensure-visibility-of-__boot_cpu_mode.patch
queue-3.10/arm64-change-kernel-stack-size-to-16k.patch
queue-3.10/arm64-use-normal-noncacheable-memory-for-writecombine.patch
queue-3.10/arm64-fix-possible-invalid-fpsimd-initialization-state.patch
queue-3.10/arm64-check-for-number-of-arguments-in-syscall_get-set_arguments.patch
queue-3.10/arm64-remove-unused-cpu_name-ascii-in-arch-arm64-mm-proc.s.patch
queue-3.10/clocksource-arch_timer-use-virtual-counters.patch
queue-3.10/arm64-ptrace-avoid-using-hw_breakpoint_empty-for-disabled-events.patch
queue-3.10/arm64-avoid-cache-flushing-in-flush_dcache_page.patch
queue-3.10/arm64-spinlock-retry-trylock-operation-if-strex-fails-on-free-lock.patch
queue-3.10/arm64-do-not-flush-the-d-cache-for-anonymous-pages.patch
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