On Sun, Jan 05, 2014 at 04:40:23PM +0100, Andrew Lunn wrote: > > > +static int __init mvebu_soc_id_init(void) > > > +{ > > > + struct device_node *np; > > > + int ret = 0; > > > + > > > + np = of_find_matching_node(NULL, mvebu_pcie_of_match_table); > > > + if (np) { > > > + void __iomem *pci_base; > > > + struct clk *clk; > > > + /* > > > + * ID and revision are available from any port, so we > > > + * just pick the first one > > > + */ > > > + struct device_node *child = of_get_next_child(np, NULL); > > > > I guess all this will fail if for some reason the PCIe node is not > > present on machines that don't use PCIe. > > Hi Arnd > > That would be rather odd. These nodes are in the top level SoC dtsi > file. When they are not used, they have status = "disabled" and are in > the dtb blob with this state. Hang on, you can't safely read from a disabled PCI node, it could have been powered down by the bootloader.. Jason -- To unsubscribe from this list: send the line "unsubscribe stable" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html