Quoting Peng Fan (2019-05-19 19:03:19)
> To Frac pll, the gate shift is 13, however to Int PLL the gate shift
> is 11.
>
> Cc: <stable@xxxxxxxxxxxxxxx>
> Fixes: ba5625c3e27 ("clk: imx: Add clock driver support for imx8mm")
> Signed-off-by: Peng Fan <peng.fan@xxxxxxx>
> Reviewed-by: Fabio Estevam <festevam@xxxxxxxxx>
> Reviewed-by: Jacky Bai <ping.bai@xxxxxxx>
> ---
Applied to clk-fixes
