On Thu, 2019-04-11 at 13:19 -0700, Stephen Boyd wrote:
> Quoting Weiyi Lu (2019-03-04 21:05:43)
> > On some Mediatek platforms, there are critical clocks of
> > clock gate type.
> > To register clock gate with flags CLK_IS_CRITICAL,
> > we need to add the flags field in mtk_gate data and register APIs.
> >
> > Signed-off-by: Weiyi Lu <weiyi.lu@xxxxxxxxxxxx>
>
> This patch doesn't apply, because it's already there via commit
> 5a1cc4c27ad2 ("clk: mediatek: Add flags to mtk_gate").
>
Got it, but just catch a minor defect by 5a1cc4c27ad2 ("clk: mediatek:
Add flags to mtk_gate").
init.flags = CLK_SET_RATE_PARENT;
...
init.flags = flags;
I'll send a fix later.
Thanks for the help on the MT8183 clk series.
>
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