On Wed, Feb 27, 2019 at 09:57:15AM +0000, Sverdlin, Alexander (Nokia - DE/Ulm) wrote:
> It was observed that reads crossing 4K address boundary are failing.
>
> This limitation is mentioned in Intel documents:
>
> Intel(R) 9 Series Chipset Family Platform Controller Hub (PCH) Datasheet:
>
> "5.26.3 Flash Access
> Program Register Access:
> * Program Register Accesses are not allowed to cross a 4 KB boundary..."
>
> Enhanced Serial Peripheral Interface (eSPI)
> Interface Base Specification (for Client and Server Platforms):
>
> "5.1.4 Address
> For other memory transactions, the address may start or end at any byte
> boundary. However, the address and payload length combination must not
> cross the naturally aligned address boundary of the corresponding Maximum
> Payload Size. It must not cross a 4 KB address boundary."
>
> Avoid this by splitting an operation crossing the boundary into two
> operations.
>
> Cc: stable@xxxxxxxxxxxxxxx
> Reported-by: Romain Porte <romain.porte@xxxxxxxxx>
> Tested-by: Pascal Fabreges <pascal.fabreges@xxxxxxxxx>
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@xxxxxxxxx>
> ---
> Changelog:
> v2: More macros! As Mika suggested.
>
> drivers/mtd/spi-nor/intel-spi.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/intel-spi.c b/drivers/mtd/spi-nor/intel-spi.c
> index af0a220..8c279c4 100644
> --- a/drivers/mtd/spi-nor/intel-spi.c
> +++ b/drivers/mtd/spi-nor/intel-spi.c
> @@ -632,6 +632,10 @@ static ssize_t intel_spi_read(struct spi_nor *nor, loff_t from, size_t len,
> while (len > 0) {
> block_size = min_t(size_t, len, INTEL_SPI_FIFO_SZ);
>
> + /* Read cannot cross 4K boundary */
> + blocksize = min(from + block_size, round_up(from + 1, SZ_4K)) -
> + from;
Nit:
It looks better if you put it into one line like:
blocksize = min(from + block_size, round_up(from + 1, SZ_4K)) - from;
Regardless of that,
Acked-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx>
