Hi,
On lun., déc. 17 2018, Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx> wrote:
> The gpio IP on Armada 370 at offset 0x18180 has neither a clk nor pwm
> registers. So there is no need for a clk as the pwm isn't used anyhow.
> So only check for the clk in the presence of the pwm registers. This fixes
> a failure to probe the gpio driver for the above mentioned gpio device.
>
> Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx>
Reviewed-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx>
Thanks,
Gregory
> ---
> drivers/gpio/gpio-mvebu.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
> index 6e02148c208b..adc768f908f1 100644
> --- a/drivers/gpio/gpio-mvebu.c
> +++ b/drivers/gpio/gpio-mvebu.c
> @@ -773,9 +773,6 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
> "marvell,armada-370-gpio"))
> return 0;
>
> - if (IS_ERR(mvchip->clk))
> - return PTR_ERR(mvchip->clk);
> -
> /*
> * There are only two sets of PWM configuration registers for
> * all the GPIO lines on those SoCs which this driver reserves
> @@ -786,6 +783,9 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
> if (!res)
> return 0;
>
> + if (IS_ERR(mvchip->clk))
> + return PTR_ERR(mvchip->clk);
> +
> /*
> * Use set A for lines of GPIO chip with id 0, B for GPIO chip
> * with id 1. Don't allow further GPIO chips to be used for PWM.
> --
> 2.19.2
>
>
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--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
