On 2018.12.03 16:29:23 +0800, Tina Zhang wrote:
> Commit b244ffa15c8b ("drm/i915/gvt: Fix drm_format_mod value for vGPU
> plane") introduced a regression issue to the tiled memory decoding on BDW.
>
> This patch can fix this issue.
>
> Here is the issue detail: https://github.com/intel/gvt-linux/issues/61
>
> v1->v2:
> - Refine the commit message. (Zhenyu)
>
> Fixes: b244ffa15c8b("drm/i915/gvt: Fix drm_format_mod value for vGPU plane")
> Signed-off-by: Tina Zhang <tina.zhang@xxxxxxxxx>
> Cc: stable@xxxxxxxxxxxxxxx # v4.19+
> Cc: Zhenyu Wang <zhenyuw@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/gvt/fb_decoder.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c b/drivers/gpu/drm/i915/gvt/fb_decoder.c
> index 481896f..85e6736 100644
> --- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
> +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
> @@ -235,7 +235,7 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu,
> plane->bpp = skl_pixel_formats[fmt].bpp;
> plane->drm_format = skl_pixel_formats[fmt].drm_format;
> } else {
> - plane->tiled = !!(val & DISPPLANE_TILED);
> + plane->tiled = val & DISPPLANE_TILED;
> fmt = bdw_format_to_drm(val & DISPPLANE_PIXFORMAT_MASK);
> plane->bpp = bdw_pixel_formats[fmt].bpp;
> plane->drm_format = bdw_pixel_formats[fmt].drm_format;
> --
> 2.7.4
>
Applied. Thanks!
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