Re: [PATCH v2] mtd: rawnand: marvell: check for RDY bits after enabling the IRQ

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On 02/10/18 11:13, Boris Brezillon wrote:
> On Mon, 1 Oct 2018 22:01:27 +0000
> Chris Packham <Chris.Packham@xxxxxxxxxxxxxxxxxxx> wrote:
> 
>> On 02/10/18 10:41, Boris Brezillon wrote:
>>> On Mon, 1 Oct 2018 22:34:38 +0200
>>> Boris Brezillon <boris.brezillon@xxxxxxxxxxx> wrote:
>>>       
>>>>>
>>>>> I'd previously tried readl() based on the same hunch. No change.
>>>>>
>>>>> I think my snippet above might be misleading. While a delay between
>>>>> readl_relaxed() and the if should not change the outcome, this is also a
>>>>> delay between marvell_nfc_enable_int() and marvell_nfc_disable_int()
>>>>> which is probably more significant. Sure enough if I move the delay to
>>>>> just before the marvell_nfc_disable_int() the error is not seen.
>>>>
>>>> AFAICT, your timeout always happens when waiting for RDREQ, not RDYM.
>>>> So maybe disabling MRDY too early has a side-effect on the RDREQ event.
>>>
>>> Can you try with this patch [1]? It should ensure that NDSR_RDY bits
>>> are cleared before starting an operation.
>>>
>>> [1]http://code.bulix.org/lgs30c-468205
>>>    
>>
>> No luck. I applied that on top of Daniel's and got the same result.
>>
>> One thing that does look promising is the following modification of
>> Daniel's patch[1]. Which moves the RDY check to before where the
>> interrupts are enabled.
> 
> Except we still don't know why this is happening, and I'm not sure I
> want to take a fix without understanding why it does fix the problem.

Agreed. My only guess is that there is some interrupt that is missed in 
the short period they are disabled when calling complete().

> Also, it looks like complete() is not called until the RDDREQ, WRDREQ
> and WRCMDREQ are cleared in the interrupt handler [1], which is weird.
> Miquel, do you happen to remember why you had to do that?
> 
> [1]https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/mtd/nand/raw/marvell_nand.c?h=v4.19-rc6#n689
> 





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