On Thu, Oct 31, 2013 at 03:49:04PM +0100, Paolo Bonzini wrote:
> Il 31/10/2013 15:34, Gleb Natapov ha scritto:
> > I haven't checked AMD doc, but if it is documented that lahf/sahf #UDs at 64
> > bit we should emulate it correctly.
>
> It says "The LAHF instruction can only be executed in 64-bit mode if
> supported by the processor implementation. Check the status of ECX bit 0
> returned by CPUID function 8000_0001h to verify that the processor
> supports LAHF in 64-bit mode". Same as Intel---in fact 80000001h is an
> "AMD leaf" so to speak.
Yes, we #UD if L/SAHF are not supported:
Invalid opcode, The LAHF instruction is not supported, as indicated by CPUID
#UD Fn8000_0001_ECX[LahfSahf] = 0.
> I found "AMD introduced support for the instructions with their Athlon
> 64, Opteron and Turion 64 revision D processors in March 2005 and Intel
> introduced support for the instructions with the Pentium 4 G1 stepping
> in December 2005". I think we can for all practical purposes ignore the
> lahf_lm CPUID flag.
>
> > Who knows what code depends on it.
I remember an issue where we had to turn off the LAHF_LM CPUID bit for
certain K8s because otherwise the flashplayer would SIGSEGV as it was
trying to execute LAHF but the CPU was not really supporting it although
CPUID said so :). See fbd8b1819e80a and 6b0f43ddfa358.
--
Regards/Gruss,
Boris.
Sent from a fat crate under my desk. Formatting is fine.
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