On Mon, 7 May 2018 11:35:22 +0200
Boris Brezillon <boris.brezillon@xxxxxxxxxxx> wrote:
> On Fri, 4 May 2018 21:24:31 +0200
> Boris Brezillon <boris.brezillon@xxxxxxxxxxx> wrote:
>
> > NAND chips require a bit of time to take the NAND operation into
> > account and set the BUSY bit in the STATUS reg. Make sure we don't poll
> > the STATUS reg too early in nand_soft_waitrdy().
> >
> > Fixes: 8878b126df76 ("mtd: nand: add ->exec_op() implementation")
> > Cc: <stable@xxxxxxxxxxxxxxx>
> > Signed-off-by: Boris Brezillon <boris.brezillon@xxxxxxxxxxx>
> > ---
> > Changes in v2:
> > - Move the ndelay() to nand_soft_waitrdy() instead of having it in the
> > FSMC driver
> > ---
> > drivers/mtd/nand/raw/nand_base.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
> > index 72f3a89da513..da94fcb4dd9b 100644
> > --- a/drivers/mtd/nand/raw/nand_base.c
> > +++ b/drivers/mtd/nand/raw/nand_base.c
> > @@ -706,12 +706,17 @@ static void nand_wait_status_ready(struct mtd_info *mtd, unsigned long timeo)
> > */
> > int nand_soft_waitrdy(struct nand_chip *chip, unsigned long timeout_ms)
> > {
> > + const struct nand_sdr_timings *timings;
> > u8 status = 0;
> > int ret;
> >
> > if (!chip->exec_op)
> > return -ENOTSUPP;
> >
> > + /* Wait tWB before polling the STATUS reg. */
> > + timings = nand_get_sdr_timings(&chip->data_interface);
> > + ndelay(PSEC_TO_NSEC(sdr->tWB_max));
>
> ^ timings->tWB_max
>
> And for those who wonder, yes, I compiled the code, but it seems I
> forgot to amend the commit after fixing the bug locally :-).
Queued to mtd/master after fixing the problem.
>
> > +
> > ret = nand_status_op(chip, NULL);
> > if (ret)
> > return ret;
>
>
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