Your patch add rmb() before read in readX(), why inX() need rmb() after read?
Huacai
On Mon, Apr 23, 2018 at 12:31 PM, <okaya@xxxxxxxxxxxxxx> wrote:
> On 2018-04-22 23:53, Huacai Chen wrote:
>>
>> While a barrier is present in the outX() functions before the register
>> write, a similar barrier is missing in the inX() functions after the
>> register read. This could allow memory accesses following inX() to
>> observe stale data.
>>
>> This patch is very similar to commit a1cc7034e33d12dc1 ("MIPS: io: Add
>> barrier after register read in readX()"). Because war_io_reorder_wmb()
>> is both used by writeX() and outX(), if readX() need a barrier then so
>> does inX().
>>
>> Cc: stable@xxxxxxxxxxxxxxx
>> Signed-off-by: Huacai Chen <chenhc@xxxxxxxxxx>
>> ---
>> arch/mips/include/asm/io.h | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
>> index a7d0b83..cea8ad8 100644
>> --- a/arch/mips/include/asm/io.h
>> +++ b/arch/mips/include/asm/io.h
>> @@ -414,6 +414,8 @@ static inline type pfx##in##bwlq##p(unsigned long
>> port) \
>> __val = *__addr; \
>> slow; \
>> \
>> + /* prevent prefetching of coherent DMA data prematurely */ \
>> + rmb(); \
>> return pfx##ioswab##bwlq(__addr, __val); \
>> }
>
>
> Typically read barrier is applied after register read.