Re: [PATCH 3.2 094/149] can: flexcan: fix flexcan_chip_start() on imx6

[Luis Henriques <luis.henriques@xxxxxxxxxxxxx>]

Ben Hutchings <ben@xxxxxxxxxxxxxxx> writes:

> 3.2.52-rc1 review patch.  If anyone has any objections, please let me know.

Looks like this patch introduces a regression.  According to Marc, the
fix is on its way into mainline ("can: flexcan: flexcan_chip_start:
fix regression, mark one MB for TX and abort pending TX"), although I
haven't seen it in netdev git repo.

Cheers,
-- 
Luis

>
> ------------------
>
> From: Marc Kleine-Budde <mkl@xxxxxxxxxxxxxx>
>
> commit 0d1862ea1a5bb876cf05555a7307080cb75bf379 upstream.
>
> In the flexcan_chip_start() function first the flexcan core is going through
> the soft reset sequence, then the RX FIFO is enabled.
>
> With the hardware is put into FIFO mode, message buffers 1...7 are reserved by
> the FIFO engine. The remaining message buffers are in reset default values.
> This patch removes the bogus initialization of the message buffers, as it
> causes an imprecise external abort on imx6.
>
> Reported-by: Lothar Waßmann <LW@xxxxxxxxxxxxxxxxxxx>
> Tested-by: Lothar Waßmann <LW@xxxxxxxxxxxxxxxxxxx>
> Signed-off-by: Marc Kleine-Budde <mkl@xxxxxxxxxxxxxx>
> Signed-off-by: Ben Hutchings <ben@xxxxxxxxxxxxxxx>
> ---
>  drivers/net/can/flexcan.c | 12 ------------
>  1 file changed, 12 deletions(-)
>
> --- a/drivers/net/can/flexcan.c
> +++ b/drivers/net/can/flexcan.c
> @@ -666,7 +666,6 @@ static int flexcan_chip_start(struct net
>  {
>  	struct flexcan_priv *priv = netdev_priv(dev);
>  	struct flexcan_regs __iomem *regs = priv->base;
> -	unsigned int i;
>  	int err;
>  	u32 reg_mcr, reg_ctrl;
>  
> @@ -732,17 +731,6 @@ static int flexcan_chip_start(struct net
>  	dev_dbg(dev->dev.parent, "%s: writing ctrl=0x%08x", __func__, reg_ctrl);
>  	flexcan_write(reg_ctrl, &regs->ctrl);
>  
> -	for (i = 0; i < ARRAY_SIZE(regs->cantxfg); i++) {
> -		flexcan_write(0, &regs->cantxfg[i].can_ctrl);
> -		flexcan_write(0, &regs->cantxfg[i].can_id);
> -		flexcan_write(0, &regs->cantxfg[i].data[0]);
> -		flexcan_write(0, &regs->cantxfg[i].data[1]);
> -
> -		/* put MB into rx queue */
> -		flexcan_write(FLEXCAN_MB_CNT_CODE(0x4),
> -			&regs->cantxfg[i].can_ctrl);
> -	}
> -
>  	/* acceptance mask/acceptance code (accept everything) */
>  	flexcan_write(0x0, &regs->rxgmask);
>  	flexcan_write(0x0, &regs->rx14mask);
>
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