On Sat, 2018-03-24 at 17:57 +0100, gregkh@xxxxxxxxxxxxxxxxxxx wrote:
> The patch below does not apply to the 4.15-stable tree.
> If someone wants it applied there, or to any other stable or longterm
> tree, then please email the backport, including the original git commit
> id to <stable@xxxxxxxxxxxxxxx>.
Hi Greg,
Unless I missed something, the change which introduced the issue is not part of
the 4.15 stable history which is why the fix does not apply and is not needed.
Regards
Jerome
>
> thanks,
>
> greg k-h
>
> ------------------ original commit in Linus's tree ------------------
>
> From 7f95beea36089918335eb1810ddd7ba8cf9d09cc Mon Sep 17 00:00:00 2001
> From: Shawn Lin <shawn.lin@xxxxxxxxxxxxxx>
> Date: Thu, 8 Mar 2018 14:49:41 +0800
> Subject: [PATCH] clk: update cached phase to respect the fact when setting
> phase
>
> It's found that the final phase set by driver doesn't match that of
> the output from clk_summary:
>
> dwmmc_rockchip fe310000.dwmmc: Successfully tuned phase to 346
> mmc0: new ultra high speed SDR104 SDIO card at address 0001
>
> cat /sys/kernel/debug/clk/clk_summary | grep sdio_sample
> sdio_sample 0 1 0 50000000 0 0
>
> It seems the cached core->phase isn't updated after the clk was
> registered. So fix this issue by updating the core->phase if setting
> phase successfully.
>
> Fixes: 9e4d04adeb1a ("clk: add clk_core_set_phase_nolock function")
> Cc: Stable <stable@xxxxxxxxxxxxxxx>
> Cc: Jerome Brunet <jbrunet@xxxxxxxxxxxx>
> Signed-off-by: Shawn Lin <shawn.lin@xxxxxxxxxxxxxx>
> Reviewed-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx>
> Tested-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx>
> Signed-off-by: Michael Turquette <mturquette@xxxxxxxxxxxx>
>
> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
> index 0f686a9dac3e..617e56268b18 100644
> --- a/drivers/clk/clk.c
> +++ b/drivers/clk/clk.c
> @@ -2309,8 +2309,11 @@ static int clk_core_set_phase_nolock(struct clk_core *core, int degrees)
>
> trace_clk_set_phase(core, degrees);
>
> - if (core->ops->set_phase)
> + if (core->ops->set_phase) {
> ret = core->ops->set_phase(core->hw, degrees);
> + if (!ret)
> + core->phase = degrees;
> + }
>
> trace_clk_set_phase_complete(core, degrees);
>
>