Hi All, This backport patchset fixed the spectre issue, it's original branch: https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git/log/?h=kpti A few dependency or fixingpatches are also picked up, if they are necessary or no functional changes. arm64: cpu_errata: Allow an erratum to be match for all revisions of a core arm64: cpufeature: __this_cpu_has_cap() shouldn't stop early arm64: syscallno is secretly an int, make it official arm64: uaccess: consistently check object sizes arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro arm64: Factor out PAN enabling/disabling into separate uaccess_* macros arm64: move TASK_* definitions to <asm/processor.h> arm64: alternatives: apply boot time fixups via the linear mapping mm: Introduce lm_alias The patchset also on repository: git://git.linaro.org/kernel/linux-linaro-stable.git lts-4.9-spectrevv2 The kernelci.org and lkft testing show no regressions. Any comments are appreciated! Regards Alex --- Ard Biesheuvel <ard.biesheuvel@xxxxxxxxxx> (1): arm64: alternatives: apply boot time fixups via the linear mapping Catalin Marinas <catalin.marinas@xxxxxxx> (2): arm64: Factor out PAN enabling/disabling into separate uaccess_* macros arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro Dave Martin <Dave.Martin@xxxxxxx> (1): arm64: syscallno is secretly an int, make it official James Morse <james.morse@xxxxxxx> (1): arm64: cpufeature: __this_cpu_has_cap() shouldn't stop early Laura Abbott <labbott@xxxxxxxxxx> (1): mm: Introduce lm_alias Marc Zyngier <marc.zyngier@xxxxxxx> (26): arm64: cpu_errata: Allow an erratum to be match for all revisions of a core arm64: Move post_ttbr_update_workaround to C code arm64: Move BP hardening to check_and_switch_context arm64: KVM: Use per-CPU vector when BP hardening is enabled arm64: KVM: Increment PC after handling an SMC trap arm/arm64: KVM: Consolidate the PSCI include files arm/arm64: KVM: Add PSCI_VERSION helper arm/arm64: KVM: Add smccc accessors to PSCI code arm/arm64: KVM: Implement PSCI 1.0 support arm/arm64: KVM: Advertise SMCCC v1.1 arm64: KVM: Make PSCI_VERSION a fast path arm/arm64: KVM: Turn kvm_psci_version into a static inline arm64: KVM: Report SMCCC_ARCH_WORKAROUND_1 BP hardening support arm64: KVM: Add SMCCC_ARCH_WORKAROUND_1 fast handling firmware/psci: Expose PSCI conduit firmware/psci: Expose SMCCC version through psci_ops arm/arm64: smccc: Make function identifiers an unsigned quantity arm/arm64: smccc: Implement SMCCC v1.1 inline primitive arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support arm64: Kill PSCI_GET_VERSION as a variant-2 workaround arm: Add BTB invalidation on switch_mm for Cortex-A9, A12 and A17 arm: Invalidate BTB on prefetch abort outside of user mapping on Cortex A8, A9, A12 and A17 arm: KVM: Invalidate BTB on guest exit for Cortex-A12/A17 arm: Add icache invalidation on switch_mm for Cortex-A15 arm: Invalidate icache on prefetch abort outside of user mapping on Cortex-A15 arm: KVM: Invalidate icache on guest exit for Cortex-A15 Mark Rutland <mark.rutland@xxxxxxx> (1): arm64: uaccess: consistently check object sizes Robin Murphy <robin.murphy@xxxxxxx> (3): arm64: Implement array_index_mask_nospec() arm64: Make USER_DS an inclusive limit arm64: Use pointer masking to limit uaccess speculation Suzuki K Poulose <suzuki.poulose@xxxxxxx> (1): arm64: Run enable method for errata work arounds on late CPUs Will Deacon <will.deacon@xxxxxxx> (14): arm64: barrier: Add CSDB macros to control data-value prediction arm64: entry: Ensure branch through syscall table is bounded under speculation arm64: uaccess: Prevent speculative use of the current addr_limit arm64: uaccess: Don't bother eliding access_ok checks in __{get, put}_user arm64: uaccess: Mask __user pointers for __arch_{clear, copy_*}_user arm64: futex: Mask __user pointers prior to dereference drivers/firmware: Expose psci_get_version through psci_ops structure arm64: cpufeature: Pass capability structure to ->enable callback arm64: Add skeleton to harden the branch predictor against aliasing attacks arm64: entry: Apply BP hardening for high-priority synchronous exceptions arm64: entry: Apply BP hardening for suspicious interrupts from EL0 arm64: cputype: Add missing MIDR values for Cortex-A72 and Cortex-A75 arm64: Implement branch predictor hardening for affected Cortex-A CPUs arm64: Add README describing the branch Yury Norov <ynorov@xxxxxxxxxxxxxxxxxx> (1): arm64: move TASK_* definitions to <asm/processor.h>