4.15-stable review patch. If anyone has any objections, please let me know. ------------------ From: David Woodhouse dwmw@xxxxxxxxxxxx commit 5d10cbc91d9eb5537998b65608441b592eec65e7 AMD exposes the PRED_CMD/SPEC_CTRL MSRs slightly differently to Intel. See http://lkml.kernel.org/r/2b3e25cc-286d-8bd0-aeaf-9ac4aae39de8@xxxxxxx Signed-off-by: David Woodhouse <dwmw@xxxxxxxxxxxx> Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx> Reviewed-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> Cc: Tom Lendacky <thomas.lendacky@xxxxxxx> Cc: gnomes@xxxxxxxxxxxxxxxxxxx Cc: ak@xxxxxxxxxxxxxxx Cc: ashok.raj@xxxxxxxxx Cc: dave.hansen@xxxxxxxxx Cc: karahmed@xxxxxxxxx Cc: arjan@xxxxxxxxxxxxxxx Cc: torvalds@xxxxxxxxxxxxxxxxxxxx Cc: peterz@xxxxxxxxxxxxx Cc: bp@xxxxxxxxx Cc: pbonzini@xxxxxxxxxx Cc: tim.c.chen@xxxxxxxxxxxxxxx Cc: gregkh@xxxxxxxxxxxxxxxxxxxx Link: https://lkml.kernel.org/r/1516896855-7642-4-git-send-email-dwmw@xxxxxxxxxxxx Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> --- arch/x86/include/asm/cpufeatures.h | 3 +++ 1 file changed, 3 insertions(+) --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -269,6 +269,9 @@ #define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */ #define X86_FEATURE_IRPERF (13*32+ 1) /* Instructions Retired Count */ #define X86_FEATURE_XSAVEERPTR (13*32+ 2) /* Always save/restore FP error pointers */ +#define X86_FEATURE_AMD_PRED_CMD (13*32+12) /* Prediction Command MSR (AMD) */ +#define X86_FEATURE_AMD_SPEC_CTRL (13*32+14) /* Speculation Control MSR only (AMD) */ +#define X86_FEATURE_AMD_STIBP (13*32+15) /* Single Thread Indirect Branch Predictors (AMD) */ /* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */ #define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */