On 01/02/18 13:22, Andrew Cooper wrote: > On 01/02/18 12:16, Juergen Gross wrote: >> When running as Xen pv guest %gs is initialized some time after >> C code is started. Depending on stack protector usage this might be >> too late, resulting in page faults. >> >> So setup %gs and MSR_GS_BASE in assembly code already. >> >> Cc: stable@xxxxxxxxxxxxxxx >> Signed-off-by: Juergen Gross <jgross@xxxxxxxx> >> --- >> arch/x86/xen/xen-head.S | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S >> index 497cc55a0c16..b47d87076efb 100644 >> --- a/arch/x86/xen/xen-head.S >> +++ b/arch/x86/xen/xen-head.S >> @@ -9,7 +9,9 @@ >> >> #include <asm/boot.h> >> #include <asm/asm.h> >> +#include <asm/msr.h> >> #include <asm/page_types.h> >> +#include <asm/percpu.h> >> #include <asm/unwind_hints.h> >> >> #include <xen/interface/elfnote.h> >> @@ -35,6 +37,18 @@ ENTRY(startup_xen) >> mov %_ASM_SI, xen_start_info >> mov $init_thread_union+THREAD_SIZE, %_ASM_SP >> >> + /* Set up %gs. >> + * >> + * The base of %gs always points to the bottom of the irqstack >> + * union. If the stack protector canary is enabled, it is >> + * located at %gs:40. Note that, on SMP, the boot cpu uses >> + * init data section till per cpu areas are set up. >> + */ >> + movl $MSR_GS_BASE,%ecx >> + movq $INIT_PER_CPU_VAR(irq_stack_union),%rax >> + cdq >> + wrmsr > > You surely want a #ifdef __x86_64__ ? This path is common to the 32bit > entry as well? Oh, indeed! Thanks for noticing. V2 coming soon... Juergen