On Thu, Jan 11, 2018 at 12:25:31AM +0000, Maciej W. Rozycki wrote:
> In preparation to fix a commit 72b22bbad1e7 ("MIPS: Don't assume 64-bit
> FP registers for FP regset") FCSR access regression factor out
> NT_PRFPREG regset access helpers for the non-MSA and the MSA variants
> respectively, to avoid having to deal with excessive indentation in the
> actual fix.
>
> No functional change, however use `target->thread.fpu.fpr[0]' rather
> than `target->thread.fpu.fpr[i]' for FGR holding type size determination
> as there's no `i' variable to refer to anymore, and for the factored out
> `i' variable declaration use `unsigned int' rather than `unsigned' as
> its type, following the common style.
>
> Signed-off-by: Maciej W. Rozycki <macro@xxxxxxxx>
> Fixes: 72b22bbad1e7 ("MIPS: Don't assume 64-bit FP registers for FP regset")
> Cc: James Hogan <james.hogan@xxxxxxxx>
> Cc: Paul Burton <Paul.Burton@xxxxxxxx>
> Cc: Alex Smith <alex@xxxxxxxxxxxxxxxx>
> Cc: Dave Martin <Dave.Martin@xxxxxxx>
> Cc: linux-mips@xxxxxxxxxxxxxx
> Cc: linux-kernel@xxxxxxxxxxxxxxx
> Cc: stable@xxxxxxxxxxxxxxx # v3.15+
> Patchwork: https://patchwork.linux-mips.org/patch/17925/
> Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
> ---
> Hi,
>
> This is a (mechanically regenerated) version of commit a03fe72572c1 for
> 3.18-stable and before. No functional changes. Please apply.
Can you send all of these as a patch series, as I have no idea what
order to apply these in and my first guess was all wrong, and nothing
applied at all :(
thanks,
greg k-h