On Tue, 2017-09-19 at 08:52 -0700, Christoph Hellwig wrote: > On Tue, Sep 19, 2017 at 12:49:21PM -0300, Guilherme G. Piccoli wrote: > > > > On 09/19/2017 12:37 PM, Christoph Hellwig wrote: > > > > > > On Tue, Sep 19, 2017 at 12:11:55PM -0300, Guilherme G. Piccoli > > > wrote: > > > > > > > > src_writel(dev, MUnit.IDR, IOP_SRC_RESET_MASK); > > > > + > > > > + msleep(5000); > > > > > > src_writel is a writel, and thus a posted MMIO write. You'll > > > need > > > to have to a read first to make it a reliable timing base. > > > > > > > Just for my full understanding - you're saying a readl BEFORE > > src_writel() or AFTER src_writel() ? > > AFTER. Actually, the whole problem sounds like a posted write. Likely the write that causes the reset doesn't get flushed until the read checking if the reset has succeeded, which might explain the 100% initial failure. Why not throw away that first value if it's a failure and then do your polled wait and timeout on the reset success. We should anyway be waiting some time for a reset to be issued, so even on non- posted write systems we could see this problem intermittently. James