On Tue, Aug 1, 2017 at 10:54 PM, Icenowy Zheng <icenowy@xxxxxxx> wrote:
> The V3s pin controller doesn't have the bank 0 (starts at address
> 0x200), which is like A33. However, this is not workarounded when
was not worked around
"Work around" is a verb phrase. "Workaround" is a noun.
> developing the driver, which makes IRQ not working.
broke the IRQs.
>
> Fix the IRQ bank base.
>
> Fixes: 56d9e4a76039 ("pinctrl: sunxi: add driver for V3s SoC")
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Icenowy Zheng <icenowy@xxxxxxx>
Confirmed this is the same thing we saw on A33.
The fix is the same.
Apart from the typo / grammar errors above,
Reviewed-by: Chen-Yu Tsai <wens@xxxxxxxx>