Re: [PATCH 1/2] IB/mlx5: Fix cached MR allocation flow

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On Mon, 2017-06-12 at 10:36 +0300, Leon Romanovsky wrote:
> From: Majd Dibbiny <majd@xxxxxxxxxxxx>
> 
> When we have a miss in one order of the mkey cache, we try to get
> an mkey from a higher order.
> 
> We still need to check that the higher order can be used with UMR
> before using it. Otherwise, we will get an mkey with 0 entries and
> the post send operation that is used to fill it will complete with
> the following error:
> 
> mlx5_0:dump_cqe:275:(pid 0): dump error cqe
> 00000000 00000000 00000000 00000000
> 00000000 00000000 00000000 00000000
> 00000000 0f007806 25000025 49ce59d2
> 
> Fixes: 49780d42dfc9 ("IB/mlx5: Expose MR cache for mlx5_ib")
> Cc: <stable@xxxxxxxxxxxxxxx> # v4.10+
> Signed-off-by: Majd Dibbiny <majd@xxxxxxxxxxxx>
> Reviewed-by: Ilya Lesokhin <ilyal@xxxxxxxxxxxx>
> Signed-off-by: Leon Romanovsky <leon@xxxxxxxxxx>

Thanks, applied.

-- 
Doug Ledford <dledford@xxxxxxxxxx>
    GPG KeyID: B826A3330E572FDD
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