Patch "MIPS: Fix unaligned PC interpretation in `compute_return_epc'" has been added to the 4.4-stable tree

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This is a note to let you know that I've just added the patch titled

    MIPS: Fix unaligned PC interpretation in `compute_return_epc'

to the 4.4-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     mips-fix-unaligned-pc-interpretation-in-compute_return_epc.patch
and it can be found in the queue-4.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@xxxxxxxxxxxxxxx> know about it.


>From 11a3799dbeb620bf0400b1fda5cc2c6bea55f20a Mon Sep 17 00:00:00 2001
From: "Maciej W. Rozycki" <macro@xxxxxxxxxx>
Date: Fri, 16 Jun 2017 00:07:34 +0100
Subject: MIPS: Fix unaligned PC interpretation in `compute_return_epc'

From: Maciej W. Rozycki <macro@xxxxxxxxxx>

commit 11a3799dbeb620bf0400b1fda5cc2c6bea55f20a upstream.

Fix a regression introduced with commit fb6883e5809c ("MIPS: microMIPS:
Support handling of delay slots.") and defer to `__compute_return_epc'
if the ISA bit is set in EPC with non-MIPS16, non-microMIPS hardware,
which will then arrange for a SIGBUS due to an unaligned instruction
reference.  Returning EPC here is never correct as the API defines this
function's result to be either a negative error code on failure or one
of 0 and BRANCH_LIKELY_TAKEN on success.

Fixes: fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.")
Signed-off-by: Maciej W. Rozycki <macro@xxxxxxxxxx>
Cc: James Hogan <james.hogan@xxxxxxxxxx>
Cc: linux-mips@xxxxxxxxxxxxxx
Patchwork: https://patchwork.linux-mips.org/patch/16395/
Signed-off-by: Ralf Baechle <ralf@xxxxxxxxxxxxxx>
Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx>

---
 arch/mips/include/asm/branch.h |    5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

--- a/arch/mips/include/asm/branch.h
+++ b/arch/mips/include/asm/branch.h
@@ -74,10 +74,7 @@ static inline int compute_return_epc(str
 			return __microMIPS_compute_return_epc(regs);
 		if (cpu_has_mips16)
 			return __MIPS16e_compute_return_epc(regs);
-		return regs->cp0_epc;
-	}
-
-	if (!delay_slot(regs)) {
+	} else if (!delay_slot(regs)) {
 		regs->cp0_epc += 4;
 		return 0;
 	}


Patches currently in stable-queue which might be from macro@xxxxxxxxxx are

queue-4.4/mips-send-sigill-for-bposge32-in-__compute_return_epc_for_insn.patch
queue-4.4/mips-actually-decode-jalx-in-__compute_return_epc_for_insn.patch
queue-4.4/mips-fix-a-typo-s-preset-present-in-r2-to-r6-emulation-error-message.patch
queue-4.4/mips-fix-unaligned-pc-interpretation-in-compute_return_epc.patch
queue-4.4/mips-rename-sigill_r6-to-sigill_r2r6-in-__compute_return_epc_for_insn.patch
queue-4.4/mips-send-sigill-for-linked-branches-in-__compute_return_epc_for_insn.patch
queue-4.4/mips-math-emu-prevent-wrong-isa-mode-instruction-emulation.patch



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